I2C

This section introduces the Inter-Integrated Circuit (I2C) APIs including terms and acronyms, supported features, software architecture, details on how to use this driver, enums, structures and functions. More...

Overview

This section introduces the Inter-Integrated Circuit (I2C) APIs including terms and acronyms, supported features, software architecture, details on how to use this driver, enums, structures and functions.

Terms and Acronyms

Terms	Details
DMA	Direct Memory Access.
FIFO	First In, First Out.
I2C	Inter-Integrated Circuit.

Supported features

The supported features of I2C controller are as follows.

1. I2C compliant master mode operation
2. I2C compliant slave mode operation and support slave address programable
3. Clock speed adjustable to 50 kHz, 100 kHz, 200 kHz, 400 kHz and 1000 kHz
4. Multi-write per transfer
5. Multi-read per transfer
6. I2C_FIFO transfer mode
7. DMA transfer mode

How to Use This Driver

• SW Architecture:
  See Overview of M-HAL SW Architecture for the details of SW architecture.

  This section describes the definition of APIs and provides an example on FreeRTOS to show how to use these APIs to develop an OS-related I2C driver.
  Also this section provides an example of the sequence of APIs that should be used by the I2C slave.

• The OS-HAL FreeRTOS driver sample code is as follows:
  freeRTos I2C sample code on github

Modules
	Define
	This section introduces the Macro definition that I2C OS-HAL/M-HAL/HDL used.
	Enum
	This section introduces the enumerations that I2C should configure before performing transfer.
	Function
	This section provides Fixed APIs(defined as Common Interface) to fully control the MediaTek I2C HW.
	Struct
	This section introduces the structure that I2C OS-HAL/M-HAL/HDL used.
	Typedef
	This section introduces the typedef that I2C M-HAL used.