mhal_i2s.h

/*
 * (C) 2005-2020 MediaTek Inc. All rights reserved.
 *
 * Copyright Statement:
 *
 * This MT3620 driver software/firmware and related documentation
 * ("MediaTek Software") are protected under relevant copyright laws.
 * The information contained herein is confidential and proprietary to
 * MediaTek Inc. ("MediaTek"). You may only use, reproduce, modify, or
 * distribute (as applicable) MediaTek Software if you have agreed to and been
 * bound by this Statement and the applicable license agreement with MediaTek
 * ("License Agreement") and been granted explicit permission to do so within
 * the License Agreement ("Permitted User"). If you are not a Permitted User,
 * please cease any access or use of MediaTek Software immediately.
 *
 * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
 * THAT MEDIATEK SOFTWARE RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
 * PROVIDED TO RECEIVER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS
 * ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
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 * MEDIATEK SOFTWARE AT ISSUE.
 */

#ifndef __MHAL_I2S_H__
#define __MHAL_I2S_H__

#include "mhal_osai.h"

typedef void (*i2s_dma_callback_func) (void *user_data);

#define I2S_ELENGTH     2

#define I2S_EPTR        1

typedef enum {
    MHAL_I2S_LINK_CHANNLE_PER_SAMPLE_2 = 0,
    MHAL_I2S_LINK_CHANNLE_PER_SAMPLE_4 = 1
} hal_i2s_link_channel_per_sample;


typedef enum {
    MHAL_I2S_BITS_PER_SAMPLE_32 = 0,
    MHAL_I2S_BITS_PER_SAMPLE_64 = 1,
    MHAL_I2S_BITS_PER_SAMPLE_128 = 2
} hal_i2s_link_bits_sample;


typedef enum {
    MHAL_I2S_TX_MONO_DUPLICATE_DISABLE = 0,
    MHAL_I2S_TX_MONO_DUPLICATE_ENABLE = 1
} hal_i2s_tx_mode;


typedef enum {
    MHAL_I2S_RX_DOWN_RATE_DISABLE = 0,
    MHAL_I2S_RX_DOWN_RATE_ENABLE = 1
} hal_i2s_rx_down_rate;


typedef enum {
    MHAL_I2S_MONO = 0,
    MHAL_I2S_STEREO = 1
} hal_i2s_channel_number;

typedef enum {
    MHAL_I2S0 = 0,
    MHAL_I2S1 = 1
} i2s_no;
typedef enum {
    MHAL_FN_DIS = 0,
    MHAL_FN_EN = 1
} i2s_fnen;
typedef enum {
    MHAL_I2S_TYPE_EXTERNAL_MODE = 0,
    MHAL_I2S_TYPE_EXTERNAL_TDM_MODE = 1,
    MHAL_I2S_TYPE_INTERNAL_LOOPBACK_MODE = 2
} hal_i2s_initial_type;

typedef enum {
    MHAL_I2S_SAMPLE_RATE_8K = 0,
    MHAL_I2S_SAMPLE_RATE_12K = 1,
    MHAL_I2S_SAMPLE_RATE_16K = 2,
    MHAL_I2S_SAMPLE_RATE_24K = 3,
    MHAL_I2S_SAMPLE_RATE_32K = 4,
    MHAL_I2S_SAMPLE_RATE_48K = 5,
} hal_i2s_sample_rate;

struct hal_i2s_link_config {
    hal_i2s_sample_rate sample_rate;
    hal_i2s_channel_number channel_number;
    hal_i2s_link_channel_per_sample channels_per_sample;
    hal_i2s_link_bits_sample bits_per_sample;
    u32 msb_offset;
    i2s_fnen lr_swap;
    i2s_fnen word_select_inverse;
};


struct hal_i2s_config {
    struct hal_i2s_link_config i2s_in;
    struct hal_i2s_link_config i2s_out;
    hal_i2s_tx_mode tx_mode;
    hal_i2s_rx_down_rate rx_down_rate;
};

struct mtk_i2s_private {
    /*for recording value from setting of user*/
    hal_i2s_initial_type            i2s_initial_type;
    /* backup user config */
    struct hal_i2s_config           i2s_user_config;
    /* backup TX DMA config */
    struct osai_dma_config          i2s_txdma_cfg;
    /* backup RX DMA config */
    struct osai_dma_config          i2s_rxdma_cfg;

};

struct mtk_i2s_ctlr {
    void __iomem *base;
    i2s_no i2s_port;
    u8 i2s_txdma_chnum;
    u8 i2s_rxdma_chnum;
    void __iomem *i2s_tx_fifo_port;
    void __iomem *i2s_rx_fifo_port;
    void *mdata;
};
#ifdef __cplusplus
extern "C" {
#endif

int mtk_mhal_i2s_cfg_type(struct mtk_i2s_ctlr *ctlr,
               hal_i2s_initial_type i2s_initial_type);
int mtk_mhal_i2s_reset(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_clk_en(struct mtk_i2s_ctlr *ctlr, i2s_fnen en);
int mtk_mhal_i2s_set_config(struct mtk_i2s_ctlr *ctlr,
                struct hal_i2s_config *config);
int mtk_mhal_i2s_enable_audio_top(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_disable_audio_top(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_cfg_tx_dma_irq_enable(struct mtk_i2s_ctlr *ctlr,
                       i2s_dma_callback_func callback_func);
int mtk_mhal_i2s_cfg_tx_dma_irq_disable(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_cfg_rx_dma_irq_enable(struct mtk_i2s_ctlr *ctlr,
                       i2s_dma_callback_func callback_func);
int mtk_mhal_i2s_cfg_rx_dma_irq_disable(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_start_tx_vfifo(struct mtk_i2s_ctlr *ctlr,
                         u32 *buffer,
                         u32 threshold,
                         u32 buffer_length);
int mtk_mhal_i2s_stop_tx_vfifo(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_start_rx_vfifo(struct mtk_i2s_ctlr *ctlr,
                         u32 *buffer,
                         u32 threshold,
                         u32 buffer_length);
int mtk_mhal_i2s_stop_rx_vfifo(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_enable_tx(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_disable_tx(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_enable_rx(struct mtk_i2s_ctlr *ctlr);
int mtk_mhal_i2s_disable_rx(struct mtk_i2s_ctlr *ctlr);

int mtk_mhal_i2s_move_tx_point(struct mtk_i2s_ctlr *ctlr,
                   u32 buffer_length);
int mtk_mhal_i2s_move_rx_point(struct mtk_i2s_ctlr *ctlr,
                   u32 buffer_length);
int mtk_mhal_i2s_alloc_vfifo_ch(struct mtk_i2s_ctlr *ctlr);

int mtk_mhal_i2s_release_vfifo_ch(struct mtk_i2s_ctlr *ctlr);

#ifdef __cplusplus
}
#endif

#endif              /* __MHAL_I2S_H__ */