os_hal_gpioif.h

/*
 * (C) 2005-2020 MediaTek Inc. All rights reserved.
 *
 * Copyright Statement:
 *
 * This MT3620 driver software/firmware and related documentation
 * ("MediaTek Software") are protected under relevant copyright laws.
 * The information contained herein is confidential and proprietary to
 * MediaTek Inc. ("MediaTek"). You may only use, reproduce, modify, or
 * distribute (as applicable) MediaTek Software if you have agreed to and been
 * bound by this Statement and the applicable license agreement with MediaTek
 * ("License Agreement") and been granted explicit permission to do so within
 * the License Agreement ("Permitted User"). If you are not a Permitted User,
 * please cease any access or use of MediaTek Software immediately.
 *
 * BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
 * THAT MEDIATEK SOFTWARE RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
 * PROVIDED TO RECEIVER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS
 * ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
 * NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
 * RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
 * INCORPORATED IN, OR SUPPLIED WITH MEDIATEK SOFTWARE, AND RECEIVER AGREES TO
 * LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
 * RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
 * OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
 * SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
 * RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
 * STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
 * ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO MEDIATEK SOFTWARE RELEASED
 * HEREUNDER WILL BE ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY
 * RECEIVER TO MEDIATEK DURING THE PRECEDING TWELVE (12) MONTHS FOR SUCH
 * MEDIATEK SOFTWARE AT ISSUE.
 */

#ifndef __OS_HAL_GPIOIF_H__
#define __OS_HAL_GPIOIF_H__

#include "mhal_osai.h"
#include "mhal_gpioif.h"

#define MTK_GPIOIF_MAX_GRP_NUM  6

typedef enum {
    GPIOIF_GROUP_0 = 0,
    GPIOIF_GROUP_1 = 1,
    GPIOIF_GROUP_2 = 2,
    GPIOIF_GROUP_3 = 3,
    GPIOIF_GROUP_4 = 4,
    GPIOIF_GROUP_5 = 5
} gpioif_group;

typedef enum {
    MTK_OS_GPIOIF_EVENT_COUNTER_MODE = 0,
    MTK_OS_GPIOIF_CAP_COUNTER_MODE = 1,
    MTK_OS_GPIOIF_EVENT_CAP_COUNTER_MODE = 2,
    MTK_OS_GPIOIF_MODE_MAX
} mtk_os_gpioif_mode;

typedef enum {
    GPIOIF_CLOCK_26MHZ = 0,
    GPIOIF_CLOCK_32KHZ = 1,
    GPIOIF_CLOCK_125MHZ = 2,
    GPIOIF_CLOCK_200MHZ = 3,
    GPIOIF_CLOCK_MAX
} gpioif_source_clock;

typedef enum {
    GPIOIF_NOT_SA_LIMIT_V = 0,
    GPIOIF_SA_LOW_LIMIT_V = 1,
    GPIOIF_SA_HIGH_LIMIT_V = 2,
    GPIOIF_SA_RESET_LOW_LIMIT_V = 3,
    GPIOIF_SA_RESET_HIGH_LIMIT_V = 4,
    GPIOIF_SA_MAX
} gpioif_sa_mode_limit_select;

typedef enum {
    GPIOIF_NOT_INTERRUPT = 0,
    GPIOIF_INTERRUPT_LOW_LIMIT_V = 1,
    GPIOIF_INTERRUPT_HIGH_LIMIT_V = 2,
    GPIOIF_INTERRUPT_BOTH_V = 3,
    GPIOIF_INTERRUPT_MAX
} gpioif_interrupt_limit_select;

typedef int (*gpioif_int_callback) (void *user_data);

#ifdef __cplusplus
extern "C" {
#endif

int mtk_os_hal_gpioif_ctlr_init(gpioif_group group);

int mtk_os_hal_gpioif_ctlr_deinit(gpioif_group group);

int mtk_os_hal_gpioif_set_direction_mode(
    gpioif_group group, u8 control_setting, u32 low_limit,
    u32 high_limit, u32 reset_value, gpioif_source_clock clock_source);

int mtk_os_hal_gpioif_set_updown_mode(
    gpioif_group group, u8 control_setting, u32 low_limit,
    u32 high_limit, u32 reset_value, gpioif_source_clock clock_source);

int mtk_os_hal_gpioif_set_quadrature_mode(
    gpioif_group group, u8 control_setting, u32 low_limit,
    u32 high_limit, u32 reset_value, gpioif_source_clock clock_source);

int mtk_os_hal_gpioif_set_capture_mode(
    gpioif_group group, u8 edge_type_gpio_0, u8 edge_type_gpio_1,
    gpioif_source_clock clock_source);

int mtk_os_hal_gpioif_interrupt_control(
    gpioif_group group, u8 enable, u8 clear, u32 bit);

int mtk_os_hal_gpioif_limit_comparator(
    gpioif_group group, gpioif_sa_mode_limit_select sa_limit_v,
    gpioif_interrupt_limit_select interrupt_limit_v);

int mtk_os_hal_gpioif_de_glitch(
    gpioif_group group, u8 gpio, u8 enable, u32 min_p, u32 init_v);

int mtk_os_hal_gpioif_event_counter_setting(
    gpioif_group group, u8 control_setting, u32 low_limit, u32 high_limit,
    u32 reset_value, u8 event_cnt_mode);

int mtk_os_hal_gpioif_global_cr_reset(gpioif_group group);

int mtk_os_hal_gpioif_hardware_reset(gpioif_group group,
    mtk_os_gpioif_mode mode, u8 active_reset);

int mtk_os_hal_gpioif_interrupt_count_init(gpioif_group group);

int mtk_os_hal_gpioif_capture_fifo_init(gpioif_group group);

int mtk_os_hal_gpioif_dump_int(gpioif_group group);

int mtk_os_hal_gpioif_read_gpio_event_count(gpioif_group group, u32 *pvalue);

int mtk_os_hal_gpioif_read_reset_val(gpioif_group group, u32 *pvalue);

int mtk_os_hal_gpioif_read_low_limit_val(gpioif_group group, u32 *pvalue);

int mtk_os_hal_gpioif_read_high_limit_val(gpioif_group group, u32 *pvalue);

int mtk_os_hal_gpioif_select_clock_source(gpioif_group group,
    gpioif_source_clock clock_source);

int mtk_os_hal_gpioif_counter_clock_setting(gpioif_group group, u8 enable);

int mtk_os_hal_gpioif_software_reset(gpioif_group group,
    mtk_os_gpioif_mode mode);

int mtk_os_hal_gpioif_enable_event_counter(gpioif_group group);

int mtk_os_hal_gpioif_disable_event_counter(gpioif_group group);

int mtk_os_hal_gpioif_disable_capture_counter(gpioif_group group);

int mtk_os_hal_gpioif_read_gpio_cap_fifo0_value(
    gpioif_group group, u32 *pvalue);

int mtk_os_hal_gpioif_read_gpio_cap_fifo1_value(
    gpioif_group group, u32 *pvalue);

int mtk_os_hal_gpioif_get_int_event_low_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_event_high_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_gpio2_rst_done_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_event_over_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_event_uf_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_cap_f0_full_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_cap_f1_full_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_reset_cap_f0_full_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_reset_cap_f1_full_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_cap_f0_np_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_cap_f1_np_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_cap_f0_p_count(gpioif_group group);

int mtk_os_hal_gpioif_get_int_cap_f1_p_count(gpioif_group group);

int mtk_os_hal_gpioif_interrupt_bit_wise(gpioif_group group,
    u32 bit, u8 enable);

int mtk_os_hal_gpioif_get_cap_fifo0_count(gpioif_group group);

int mtk_os_hal_gpioif_get_cap_fifo1_count(gpioif_group group);

int mtk_os_hal_gpioif_get_cap_fifo0_val(gpioif_group group, u32 idex);

int mtk_os_hal_gpioif_get_cap_fifo1_val(gpioif_group group, u32 idex);

int mtk_os_hal_gpioif_int_callback_register(gpioif_group group,
    gpioif_int_callback callback, void *user_data);

#ifdef __cplusplus
}
#endif

#endif