Azure Sphere MT3620 M4 API Reference Manual
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This section provides fixed APIs(defined as Common Interface) to fully control the MediaTek MBOX HW. More...
This section provides fixed APIs(defined as Common Interface) to fully control the MediaTek MBOX HW.
Functions | |
int | mtk_mhal_mbox_reset (void __iomem *base) |
This function is used to reset MBOX channel. More... | |
int | mtk_mhal_mbox_fifo_read (void __iomem *base, struct mbox_fifo_item *buf, mbox_tr_type_t type) |
This function is used to read MBOX channel FIFO data. More... | |
int | mtk_mhal_mbox_fifo_write (void __iomem *base, const struct mbox_fifo_item *buf, mbox_tr_type_t type) |
This function is used to write data to MBOX channel FIFO. More... | |
int | mtk_mhal_mbox_ioctl (void __iomem *base, mbox_ioctl_t ctrl, void *arg) |
Control various hardware settings of MBOX. More... | |
int mtk_mhal_mbox_reset | ( | void __iomem * | base | ) |
This function is used to reset MBOX channel.
Usage: It is used for OS-HAL to reset MBOX channel when opening channel. After reset, the other end of MBOX should also be reset; otherwise, the MBOX function will be abnormal.
[in] | base | : MBOX channel base address. |
int mtk_mhal_mbox_fifo_read | ( | void __iomem * | base, |
struct mbox_fifo_item * | buf, | ||
mbox_tr_type_t | type | ||
) |
This function is used to read MBOX channel FIFO data.
Usage: Reading data and/or cmd from FIFO when receiving write interrupt or non-empty interrupt.
[in] | base | : MBOX channel base address. |
[out] | buf | : Buffer to load data and/or cmd. |
[in] | type | : Transfer type; see mbox_tr_type_t for details. |
int mtk_mhal_mbox_fifo_write | ( | void __iomem * | base, |
const struct mbox_fifo_item * | buf, | ||
mbox_tr_type_t | type | ||
) |
This function is used to write data to MBOX channel FIFO.
Usage: Writing data and/or cmd to FIFO.
[in] | base | : MBOX channel base address. |
[in] | buf | : The data and/or cmd to be transferred. |
[in] | type | : Transfer type; see mbox_tr_type_t for details. |
int mtk_mhal_mbox_ioctl | ( | void __iomem * | base, |
mbox_ioctl_t | ctrl, | ||
void * | arg | ||
) |
Control various hardware settings of MBOX.
Usage: Getting/setting MBOX hardware settings. It is not thread-based, and do NOT call it in multi-thread.
[in] | base | : MBOX channel base address. |
[in] | ctrl | : Operation on Non-Full/Non-Empty threshold values: MBOX_IOSET_NE_THRS, MBOX_IOGET_NE_THRS, MBOX_IOSET_NF_THRS, MBOX_IOGET_NF_THRS. Hardware semaphore operations: MBOX_IOSET_SEM_POST, MBOX_IOSET_SEM_PEND. Software interrupt operations: MBOX_IOSET_SWINT_TRIG, MBOX_IOSET_SWINT_EN, MBOX_IOGET_SWINT_EN, MBOX_IOSET_SWINT_CTRL, MBOX_IOGET_SWINT_STS, MBOX_IOSET_CLEAR_SWINT. FIFO interrupt operations: MBOX_IOSET_INT_EN, MBOX_IOGET_INT_EN, MBOX_IOGET_INT_STS, MBOX_IOSET_CLEAR_INT. Get FIFO count values: MBOX_IOGET_POST_FIFO_CNT, MBOX_IOGET_ACPT_FIFO_CNT. |
[in] | arg | : MBOX_IOSET_NE_THRS: u32*, threshold value; MBOX_IOSET_NF_THRS: u32*, threshold value; MBOX_IOSET_SEM_POST: not used; MBOX_IOSET_SWINT_TRIG: u32*, interrupt number (0 ~ 7); MBOX_IOSET_SWINT_EN: u32*, interrupt mask (0 ~ 0xFF); MBOX_IOSET_SWINT_CTRL: struct mbox_swint_arg*; MBOX_IOSET_CLEAR_SWINT: u32*, software interrupt mask to be cleared; MBOX_IOSET_INT_EN: struct mbox_int_arg*; MBOX_IOSET_CLEAR_INT: struct mbox_int_arg*; |
[out] | arg | : MBOX_IOGET_NE_THRS: u32*, buffer to load threshold value; MBOX_IOGET_NF_THRS: u32*, buffer to load threshold value; MBOX_IOSET_SEM_PEND: u32*, buffer to load sema status; MBOX_IOGET_SWINT_EN: u32*, buffer to load sw int mask; MBOX_IOGET_SWINT_STS: u32*, buffer to load the status value; MBOX_IOGET_INT_EN: struct mbox_fifo_event*, buffer to load int mask; MBOX_IOGET_INT_STS: struct mbox_fifo_event*, to load int status; MBOX_IOGET_POST_FIFO_CNT: u32*, buffer to load the FIFO count which indicates how many elements have already been written; MBOX_IOGET_ACPT_FIFO_CNT: u32*, buffer to load the FIFO count which indicates how many elements can be read. |