This section describes the enumeration definitions in DMA driver OS-HAL layer. More...

Overview

This section describes the enumeration definitions in DMA driver OS-HAL layer.

These enumerations include DMA channels, DMA parameters type and dma interrrupts type. If users want to set the value for the above variables, please refer to Enumerations.

Enumerations
enum	dma_channel { DMA_ISU0_TX_CH0, DMA_ISU0_RX_CH1, DMA_ISU1_TX_CH2, DMA_ISU1_RX_CH3, DMA_ISU2_TX_CH4, DMA_ISU2_RX_CH5, DMA_ISU3_TX_CH6, DMA_ISU3_RX_CH7, DMA_ISU4_TX_CH8, DMA_ISU4_RX_CH9, DMA_M2M_CH12 = 12, VDMA_ISU0_TX_CH13, VDMA_ISU0_RX_CH14, VDMA_ISU1_TX_CH15, VDMA_ISU1_RX_CH16, VDMA_ISU2_TX_CH17, VDMA_ISU2_RX_CH18, VDMA_ISU3_TX_CH19, VDMA_ISU3_RX_CH20, VDMA_ISU4_TX_CH21, VDMA_ISU4_RX_CH22, VDMA_I2S0_TX_CH25 = 25, VDMA_I2S0_RX_CH26, VDMA_I2S1_TX_CH27, VDMA_I2S1_RX_CH28, VDMA_ADC_RX_CH29 }
	DMA channels definition. More...

enum	dma_param_type { OS_HAL_DMA_PARAM_RLCT = 0, OS_HAL_DMA_PARAM_FIX_ADDR = 1, OS_HAL_DMA_PARAM_PROG_ADDR = 2, OS_HAL_DMA_PARAM_VFF_FIFO_SIZE = 3, OS_HAL_DMA_PARAM_VFF_FIFO_CNT = 4, OS_HAL_DMA_PARAM_VFF_HWPTR = 5, OS_HAL_DMA_PARAM_VFF_SWPTR = 6 }
	DMA parameters type. More...

enum	dma_interrupt_type { DMA_INT_COMPLETION = 0x1 << 0, DMA_INT_HALF_COMPLETION = 0x1 << 1, DMA_INT_VFIFO_TIMEOUT = 0x1 << 2, DMA_INT_VFIFO_THRESHOLD = 0x1 << 3 }
	DMA interrupt type definition. More...

Enumeration Type Documentation

enum dma_channel

DMA channels definition.

This definition includes all DMA channels. Users can look up this enumeration for selecting DMA channels. The DMA_M2M_CH12 channel can be used to copy data from memory to memory, And other channels are specified for some peripheral devices which can transfer data between memory and peripheral devices. VFF DMA is Virtual FIFO DMA.

Enumerator
DMA_ISU0_TX_CH0	HALF-SIZE DMA channel 0 as ISU0-TX.
DMA_ISU0_RX_CH1	HALF-SIZE DMA channel 1 as ISU0-RX.
DMA_ISU1_TX_CH2	HALF-SIZE DMA channel 2 as ISU1-TX.
DMA_ISU1_RX_CH3	HALF-SIZE DMA channel 3 as ISU1-RX.
DMA_ISU2_TX_CH4	HALF-SIZE DMA channel 4 as ISU2-TX.
DMA_ISU2_RX_CH5	HALF-SIZE DMA channel 5 as ISU2-RX.
DMA_ISU3_TX_CH6	HALF-SIZE DMA channel 6 as ISU3-TX.
DMA_ISU3_RX_CH7	HALF-SIZE DMA channel 7 as ISU3-RX.
DMA_ISU4_TX_CH8	HALF-SIZE DMA channel 8 as ISU4-TX.
DMA_ISU4_RX_CH9	HALF-SIZE DMA channel 9 as ISU4-RX.
DMA_M2M_CH12	FULL-SIZE DMA channel 12 as memory copy.
VDMA_ISU0_TX_CH13	VFF DMA channel 13 as ISU0-TX.
VDMA_ISU0_RX_CH14	VFF DMA channel 14 as ISU0-RX.
VDMA_ISU1_TX_CH15	VFF DMA channel 15 as ISU1-TX.
VDMA_ISU1_RX_CH16	VFF DMA channel 16 as ISU1-RX.
VDMA_ISU2_TX_CH17	VFF DMA channel 17 as ISU2-TX.
VDMA_ISU2_RX_CH18	VFF DMA channel 18 as ISU2-RX.
VDMA_ISU3_TX_CH19	VFF DMA channel 19 as ISU3-TX.
VDMA_ISU3_RX_CH20	VFF DMA channel 20 as ISU3-RX.
VDMA_ISU4_TX_CH21	VFF DMA channel 21 as ISU4-TX.
VDMA_ISU4_RX_CH22	VFF DMA channel 22 as ISU4-RX.
VDMA_I2S0_TX_CH25	VFF DMA channel 25 as I2S0-TX.
VDMA_I2S0_RX_CH26	VFF DMA channel 26 as I2S0-RX.
VDMA_I2S1_TX_CH27	VFF DMA channel 27 as I2S1-TX.
VDMA_I2S1_RX_CH28	VFF DMA channel 28 as I2S1-RX.
VDMA_ADC_RX_CH29	VFF DMA channel 29 as ADC-RX.

enum dma_param_type

DMA parameters type.

This definition indicates DMA parameters which may be set or got by users. For the FULL-SIZE DMA, users only can get the OS_HAL_DMA_PARAM_RLCT. For the HALF-SIZE DMA, users can get OS_HAL_DMA_PARAM_RLCT and set/get OS_HAL_DMA_PARAM_FIX_ADDR/OS_HAL_DMA_PARAM_PROG_ADDR. For the VFF DMA, users can get OS_HAL_DMA_PARAM_VFF_FIFO_CNT/OS_HAL_DMA_PARAM_VFF_HWPTR, and set/get OS_HAL_DMA_PARAM_VFF_FIFO_SIZE/OS_HAL_DMA_PARAM_VFF_SWPTR.

Enumerator
OS_HAL_DMA_PARAM_RLCT	The remain count of data transfer, read-only for FULL-SIZE DMA and HALF-SIZE DMA.
OS_HAL_DMA_PARAM_FIX_ADDR	The fix address which indicates the data port of peripheral devices, for HALF-SIZE DMA and VFF DMA.
OS_HAL_DMA_PARAM_PROG_ADDR	The programable address which indicates the memory address, for HALF-SIZE DMA and VFF DMA.
OS_HAL_DMA_PARAM_VFF_FIFO_SIZE	The Virtual FIFO Length, only for VFF DMA.
OS_HAL_DMA_PARAM_VFF_FIFO_CNT	The byte count of data in Virtual FIFO, read-only for VFF DMA.
OS_HAL_DMA_PARAM_VFF_HWPTR	The HW pointer of Virtual FIFO, read-only for VFF DMA.
OS_HAL_DMA_PARAM_VFF_SWPTR	The SW pointer of Virtual FIFO, Only for VFF DMA.

enum dma_interrupt_type

DMA interrupt type definition.

This definition indicates DMA hardware interrupts. The FULL-SIZE DMA can set DMA_INT_COMPLETION to enable the interrupt of data transfer completion. The HALF-SIZE DMA can set DMA_INT_COMPLETION and DMA_INT_HALF_COMPLETION. The VFF DMA can set DMA_INT_VFIFO_TIMEOUT and DMA_INT_VFIFO_THRESHOLD.

Enumerator
DMA_INT_COMPLETION	The interrupt of data transfer completion, for FULL-SIZE DMA and HALF-SIZE DMA.
DMA_INT_HALF_COMPLETION	The interrupt of the half of data transfer completion, only for HALF-SIZE DMA.
DMA_INT_VFIFO_TIMEOUT	The interrupt of the Virtual FIFO data updating timeout, only for Virtual FIFO DMA.
DMA_INT_VFIFO_THRESHOLD	The interrupt of the Virtual FIFO data threshold, only for Virtual FIFO DMA.