Azure Sphere MT3620 M4 API Reference Manual
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Data Structures
Here are the data structures with brief descriptions:
oCadc_fsm_paramThis structure defines ADC related parameters,
such as ADC mode, sample times, channel map, and interrupt mode
oCaudio_parameter
oCdma_configDma_config specifies the DMA channel parameters for data transfer, such as transfer source, transfer destination and transfer count
oCdma_control_modeDma_control_mode specifies the DMA channel settings to control the DMA channel transfer mode
oCdma_controllerInterface to DMA, used to pass arguments between OS_HAL and M-HAL
oCdma_ctrlDma_ctrl specifies the DMA channel settings which control the DMA channel transfer mode
oCdma_interruptDma_interrupt indicates the callback function and users data of DMA hardware interrupts
oCdma_settingDma_setting specifies the DMA channel settings which control the DMA channel transfer
oCdma_vfifoDma_vfifo specifies the specified settings of the VFF DMA, which are only used for the VFF DMA
oCdma_wrapDma_wrap specifies the DMA channel settings which control the address-wrap function for FULL-SIZE DMA and HALF-SIZE DMA
oChal_gpt_devThe interface to GPT device
oChal_i2s_configI2S configure structure
oChal_i2s_link_configI2S link structure
oChal_wdt_devThe interface to WDT device
oCi2c_msgInterface to messages
oCmbox_fifo_eventFIFO interrupt status information or enable mask
oCmbox_fifo_itemThe data and cmd written to/read from MBOX FIFO
oCmbox_int_argTo enable/disable FIFO interrupt specified by type
oCmbox_swint_argTo enable/disable software interrupt specified by id
oCmbox_swint_infoSoftware interrupt information
oCmhal_gpioif_event_capture_settingThis structure defines the GPIOIF related parameters
oCmtk_adc_controllerInterface to ADC, used to store the hardware register base address,
clock, Rx done callback API, etc
oCmtk_com_pwm_dataUsed to store the PWM base address, group number, clock source, pwm channel common structure information
oCmtk_gpioif_configThe common configuration can be set for the GPIOIF HW
oCmtk_gpioif_controllerThis structure defines the GPIOIF related property
oCmtk_gpioif_int_countThis structure defines the GPIOIF interrupt count related parameters
oCmtk_i2c_controllerThe mtk_i2c_controller contains hardware information( such as base address) of i2c controller, data transmission information and transmission methode,etc
oCmtk_i2c_privateM-HAL private structure
oCmtk_i2s_ctlrI2S control structure
oCmtk_i2s_privateM-HAL privite structure
oCmtk_os_hal_mbox_cb_dataThe argument of user callback
oCmtk_pinctrl_controllerThis structure defines the GPIO interface controller
oCmtk_pinctrl_desc_pinThis structure defines GPIO pin related property
oCmtk_pwm_controllerInterface to PWM, used to store the hardware register base address, group information and clock
oCmtk_spi_configThe common configuration can be set for the SPIM HW
oCmtk_spi_controllerInterface to SPI master, it's used to pass arguments between OS-HAL/M-HAL/HDL
oCmtk_spi_privateM-HAL privite structure
oCmtk_spi_transferI/O INTERFACE between SPI OS-HAL and M-HAL
oCmtk_spis_configThe common configuration can be set for the SPIS HW
oCmtk_spis_controllerInterface to SPI slave, it's used to pass arguments among OS-HAL/M-HAL/HDL
oCmtk_spis_privateUsed to record spis status and required resources during transmisson
oCmtk_spis_transferI/O INTERFACE between SPI OS-HAL and M-HAL
oCmtk_uart_controllerInterface to UART
oCmtk_uart_privateM-HAL private structure
oCos_gpt_int
\Cos_wdt_intThe definition of WDT user interrupt handle structure