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Azure Sphere MT3620 M4 API Reference Manual
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| This structure defines ADC related parameters, such as ADC mode, sample times, channel map, and interrupt mode | |
| Dma_config specifies the DMA channel parameters for data transfer, such as transfer source, transfer destination and transfer count | |
| Dma_control_mode specifies the DMA channel settings to control the DMA channel transfer mode | |
| Interface to DMA, used to pass arguments between OS_HAL and M-HAL | |
| Dma_ctrl specifies the DMA channel settings which control the DMA channel transfer mode | |
| Dma_interrupt indicates the callback function and users data of DMA hardware interrupts | |
| Dma_setting specifies the DMA channel settings which control the DMA channel transfer | |
| Dma_vfifo specifies the specified settings of the VFF DMA, which are only used for the VFF DMA | |
| Dma_wrap specifies the DMA channel settings which control the address-wrap function for FULL-SIZE DMA and HALF-SIZE DMA | |
| The interface to GPT device | |
| I2S configure structure | |
| I2S link structure | |
| The interface to WDT device | |
| Interface to messages | |
| FIFO interrupt status information or enable mask | |
| The data and cmd written to/read from MBOX FIFO | |
| To enable/disable FIFO interrupt specified by type | |
| To enable/disable software interrupt specified by id | |
| Software interrupt information | |
| This structure defines the GPIOIF related parameters | |
| Interface to ADC, used to store the hardware register base address, clock, Rx done callback API, etc | |
| Used to store the PWM base address, group number, clock source, pwm channel common structure information | |
| The common configuration can be set for the GPIOIF HW | |
| This structure defines the GPIOIF related property | |
| This structure defines the GPIOIF interrupt count related parameters | |
| The mtk_i2c_controller contains hardware information( such as base address) of i2c controller, data transmission information and transmission methode,etc | |
| M-HAL private structure | |
| I2S control structure | |
| M-HAL privite structure | |
| The argument of user callback | |
| This structure defines the GPIO interface controller | |
| This structure defines GPIO pin related property | |
| Interface to PWM, used to store the hardware register base address, group information and clock | |
| The common configuration can be set for the SPIM HW | |
| Interface to SPI master, it's used to pass arguments between OS-HAL/M-HAL/HDL | |
| M-HAL privite structure | |
| I/O INTERFACE between SPI OS-HAL and M-HAL | |
| The common configuration can be set for the SPIS HW | |
| Interface to SPI slave, it's used to pass arguments among OS-HAL/M-HAL/HDL | |
| Used to record spis status and required resources during transmisson | |
| I/O INTERFACE between SPI OS-HAL and M-HAL | |
| Interface to UART | |
| M-HAL private structure | |
| The definition of WDT user interrupt handle structure |